Not all implementations literally provide all possible combinations.
_PPPP_RRRR_OOOO_TTTT______WWWW_RRRR_IIII_TTTT_EEEE is often implemented as _PPPP_RRRR_OOOO_TTTT______RRRR_EEEE_AAAA_DDDD_||||_PPPP_RRRR_OOOO_TTTT______WWWW_RRRR_IIII_TTTT_EEEE and _PPPP_RRRR_OOOO_TTTT______EEEE_XXXX_EEEE_CCCC as
_PPPP_RRRR_OOOO_TTTT______RRRR_EEEE_AAAA_DDDD_||||_PPPP_RRRR_OOOO_TTTT______EEEE_XXXX_EEEE_CCCC. This is true for all SGI implementations. In
particular, MIPS processors do not support a separate execute permission.
Any page that can be read can be executed from, even if _PPPP_RRRR_OOOO_TTTT______EEEE_XXXX_EEEE_CCCC is not
specified. As described below, the operating system uses _PPPP_RRRR_OOOO_TTTT______EEEE_XXXX_EEEE_CCCC as a
flag to indicate it may need to perform certain platform dependent
functions that may be needed to properly execute instructions from the
associated page. However, no implementation will permit a store to
succeed where _PPPP_RRRR_OOOO_TTTT______WWWW_RRRR_IIII_TTTT_EEEE has not been set.
Applications such as compiling interpreters that generate code in their
data areas and then wish to execute it, should use _mmmm_pppp_rrrr_oooo_tttt_eeee_cccc_tttt to add
_PPPP_RRRR_OOOO_TTTT______EEEE_XXXX_EEEE_CCCC permission to the corresponding pages. This must be done after
the code has been generated, but before it is executed. This causes any
necessary machine dependent activities, such as cache flushing, to occur
that are required prior to executing from any part of the process's
address space other than the program or library text segments. If the
generated instructions are altered after the previous call to _mmmm_pppp_rrrr_oooo_tttt_eeee_cccc_tttt
was made to mark the data as executable, then _mmmm_pppp_rrrr_oooo_tttt_eeee_cccc_tttt must be called to
again add _PPPP_RRRR_OOOO_TTTT______EEEE_XXXX_EEEE_CCCC before the new code is executed in order to prepare
the new contents of the page(s) for proper execution.
In some cases, it may be better for performance reasons to keep execute
permissions on a page without syncing the instruction and data cache. In
these cases, specify _PPPP_RRRR_OOOO_TTTT______EEEE_XXXX_EEEE_CCCC______NNNN_OOOO_FFFF_LLLL_UUUU_SSSS_HHHH to keep the cache from being
flushed. However, it is then up to the programmer to call _mmmm_pppp_rrrr_oooo_tttt_eeee_cccc_tttt with
_PPPP_RRRR_OOOO_TTTT______EEEE_XXXX_EEEE_CCCC to sync the cache when instructions in a page change.
On success, _mmmm_pppp_rrrr_oooo_tttt_eeee_cccc_tttt returns _0000; on failure, _mmmm_pppp_rrrr_oooo_tttt_eeee_cccc_tttt returns _----_1111 and sets
_eeee_rrrr_rrrr_nnnn_oooo to indicate an error.
EEEERRRRRRRROOOORRRRSSSS
Under the following conditions, the function _mmmm_pppp_rrrr_oooo_tttt_eeee_cccc_tttt fails and sets
_eeee_rrrr_rrrr_nnnn_oooo to:
_EEEE_AAAA_CCCC_CCCC_EEEE_SSSS _p_r_o_t specifies a protection that violates the access permission
the process has to the underlying memory object.
_EEEE_AAAA_GGGG_AAAA_IIII_NNNN _p_r_o_t specifies _PPPP_RRRR_OOOO_TTTT______WWWW_RRRR_IIII_TTTT_EEEE over a _MMMM_AAAA_PPPP______PPPP_RRRR_IIII_VVVV_AAAA_TTTT_EEEE mapping and there are
insufficient memory resources to reserve for locking the private
page.
_EEEE_IIII_NNNN_VVVV_AAAA_LLLL _a_d_d_r is not a multiple of the page size as returned by _ssss_yyyy_ssss_cccc_oooo_nnnn_ffff.
_EEEE_NNNN_OOOO_MMMM_EEEE_MMMM The argument _l_e_n has a value less than or equal to _0000.
_EEEE_NNNN_OOOO_MMMM_EEEE_MMMM Addresses in the range [_a_d_d_r, _a_d_d_r + _l_e_n) are invalid for the
address space of a process, or specify one or more pages which are
not mapped.
When _mmmm_pppp_rrrr_oooo_tttt_eeee_cccc_tttt fails for reasons other than _EEEE_IIII_NNNN_VVVV_AAAA_LLLL, the protections on
some of the pages in the range [_a_d_d_r, _a_d_d_r + _l_e_n) may have been changed.
If the error occurs on some page at _a_d_d_r_2, then the protections of all
whole pages in the range [_a_d_d_r, _a_d_d_r_2] will have been modified.